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Digital India RISC-V program launched: GoI sets timeline to roll out first indigenous microprocessors by Dec 2023

The government of India set the timeline for starting the commercial manufacturing of the indigenous microprocessors by December 2023. Union Minister of State for Electronics and Information Technology Rajeev Chandrashekhar made the announcement on Wednesday 27th April 2022 during the launch of Digital India RISC-V microprocessor program.

On the occasion, he said, “The Digital India RISC-V (DIR-V) program aims to create future generations of microprocessors that will serve the need of India’s strategic focus on mobility, computing, and digitization.” The primary aim of this program is to enable the creation of Microprocessors for the future in India, and for the world and to achieve industry-grade silicon & design wins by December 2023, he added.

IT Madras and the Centre for Development of Advanced Computing (CDAC) have developed two microprocessors named Shakti (32 bit) and Vega (64 bit) respectively using Open Source Architecture under the aegis of the Microprocessor Development Programme of the Ministry of Electronics and IT.

Hoping to roll out their commercial-scale production by the end of the calendar year 2023, Rajeev Chandrashekhar said, “DIR-V will see partnerships between Startups, Academia & Multinationals, to make India not only a RISC-V Talent Hub for the World but also a supplier of RISC-V SoC (System on Chips) for Servers, Mobile devices, Automotive, IoT & Microcontrollers across the globe. One big milestone that I am very focused on is to have the first set of commercial silicon of Shakti and Vega processors available by December 2023 or early 2024.”

He added, “We want at least a few companies to adopt their product designs to DIR-V products Shakti and Vega before 2023-24 and when the silicon is ready, they start manufacturing and incorporating chips in the products. We also believe over the next one and a half years, the partnership between the Shakri and Vega teams and the overall DIR-V program with platform companies like HP, VVDN, Apple, and a large number of companies in the electronic ecosystem will help create design wins around DIR-V family of products Shakti and Vega.”

Reminiscing his early days as an x-86 processor chip designer at Intel, Rajeev Chandrasekhar mentioned that many new processor architectures have gone through an initial period of ferment characterized by waves of innovations.

“At some point, however, they all settled on a dominant design. ARM and x-86 are two such instruction set architectures- one of which is licensed and the other is sold, where industry consolidated in earlier decades. However, RISC-V has emerged as a strong alternative to them in the last decade, having no licensing encumbrances, enabling its adoption by one and all in the semiconductor industry, at different complexity levels for various design purposes,” Rajeev said.

The Union Minister further added, “Challenging the status quo, RISC-V Instruction Set Architecture (ISA) is witnessing a quantum leap and unprecedented levels of processor innovation owing to its free and open nature. Today, there is a thriving ecosystem of chip designers in academia, scientific societies, and startups in the country, contending to gain the market share in RISC-V growing market. While India has certainly taken several early steps in the processor design area, the time is felicitous now to advocate India’s strides in RISC-V global community and unveil the Digital India RISC-V Processor roadmap to the world.”

Ayodhra Ram Mandir special coverage by OpIndia

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OpIndia Staffhttps://www.opindia.com
Staff reporter at OpIndia

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